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CAT4109 3-Channel Constant-Current RGB LED Driver with Individual PWM Dimming
Description
The CAT4109 is a 3-channel constant-current LED driver, requiring no inductor. LED channel currents up to 175 mA are programmed independently via separate external resistors. Low output voltage operation of 0.4 V at 175 mA allows for more power efficient designs across wider supply voltage range. The three LED pins are compatible with high voltage up to 25 V supporting applications with long strings of LEDs. Three independent control inputs PWM1, PWM2, PWM3, control respectively LED1, LED2, LED3 channels. The device also includes an output enable (OE) control pin to disable all three channels independently of the PWMx input states. Thermal shutdown protection is incorporated in the device to disable the LED outputs whenever the die temperature exceeds 150C. The device is available in a 16-lead SOIC package.
Features
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SOIC-16 V SUFFIX CASE 751BG
PIN CONNECTIONS
PGND GND PWM3 PWM2 PWM1 RSET3 RSET2 RSET1 (Top View) 1 VDD OE NC NC NC LED1 LED2 LED3
* * * * * * * * * *
3 Independent Current Sinks up to 175 mA rated 25 V LED Current Set by External Low Power Control Resistors Individual PWM Control per Channel Low Dropout Current Source (0.4 V at 175 mA) Output Enable Input for Dimming "Zero" Current Shutdown Mode 3 V to 5.5 V Logic Supply Thermal Shutdown Protection 16-lead SOIC Package These Devices are Pb-Free, Halogen Free/BFR Free and are RoHS Compliant
MARKING DIAGRAM
Application
L4A CAT4109VB YMXXXX
* Multi-color LED, Architectural Lighting * LED Signs and Displays * LCD Backlight
L = Assembly Location 4 = Lead Finish - NiPdAu A = Product Revision (Fixed as "A") CAT4109V = Device Code B = Leave Blank Y = Production Year (Last Digit) M = Production Month (1-9, A, B, C) XXXX = Last Four Digits of Assembly Lot Number
ORDERING INFORMATION
Device CAT4109V-GT2 (Note 1) Package SOIC-16 (Pb-Free) Shipping 2,000/ Tape & Reel
1. Lead Finish NiPdAu
(c) Semiconductor Components Industries, LLC, 2010
March, 2010 - Rev. 2
1
Publication Order Number: CAT4109/D
CAT4109
VIN 5 V to 25 V VDD 3 V to 5.5 V C1 1 mF VDD OE PWM1 PWM2 PWM3 RSET1 RSET2 RSET3 R1 R2 R3
RED GREEN BLUE LED1 LED2 LED3
CONTROLLER
CAT4109
GND
PGND
Figure 1. Typical Application Circuit
Table 1. ABSOLUTE MAXIMUM RATINGS
Parameter VDD Voltage Input Voltage Range (OE, PWM1, PWM2, PWM3) LED1, LED2, LED3 Voltage DC Output Current on LED1 to LED3 Storage Temperature Range Junction Temperature Range Lead Soldering Temperature (10 sec.) ESD Rating on All Pins: Human Body Model Machine Model Rating 6 -0.3 V to 6 V 25 200 -55 to +160 -40 to +150 300 2000 200 Units V V V mA C C C V
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.
Table 2. RECOMMENDED OPERATING CONDITIONS
Parameter VDD Voltage applied to LED1 to LED3, outputs off Voltage applied to LED1 to LED3, outputs on Output Current on LED1 to LED3 Ambient Temperature Range Range 3.0 to 5.5 up to 25 up to 6 (Note 2) 2 to 175 -40 to +85 Units V V V mA C
2. Keeping LEDx pin voltage below 6 V in operation is recommended to minimize thermal dissipation in the package.
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CAT4109
Table 3. ELECTRICAL OPERATING CHARACTERISTICS (Min and Max values are over recommended operating conditions unless specified otherwise. Typical values are at VDD = 5.0 V, TAMB = 25C.)
Symbol DC CHARACTERISTICS IDD1 IDD2 IDD3 IDD4 ISHDN ILKG ROE VOE_IH VOE_IL VPWM_IH VPWM_IL IIL VRSETx TSD THYS ILED/IRSET VUVLO Supply Current Outputs Off Supply Current Outputs Off Supply Current Outputs On Supply Current Outputs On Shutdown Current LED Output Leakage OE Pull-down Resistance OE Logic High Level OE Logic Low Level PWMx Logic High Level PWMx Logic Low Level Logic Input Leakage Current (PWMx) RSETx Regulated Voltage Thermal Shutdown Thermal Hysteresis RSET to LED Current Gain Ratio Undervoltage Lockout (UVLO) Threshold 100 mA LED Current VPWMx = VDD or GND VLED = 5 V, RSET = 24.9 kW VLED = 5 V, RSET = 5.23 kW VLED = 0.5 V, RSET = 24.9 kW VLED = 0.5 V, RSET = 5.23 kW VOE = 0 V VLED = 5 V, Outputs Off -1 140 1.3 0.7 x VDD -5 1.17 0 1.2 150 20 400 1.8 V 190 2 4 2 4 5 10 5 10 1 1 250 0.4 0.3 x VDD 5 1.23 mA mA mA mA mA mA kW V V mA V C C Name Conditions Min Typ Max Units
Table 4. RECOMMENDED TIMING (Min and Max values are over recommended operating conditions unless specified otherwise. Typical values are at VDD = 5.0 V, TAMB = 25C.)
Symbol tPS tP1 tP2 tR tF tLO tHI tPWRDWN Name Turn-On time, OE rising to ILED from Shutdown Turn-On time, OE or PWMx rising to ILED Turn-Off time, OE or PWMx falling to ILED LED rise time LED fall time OE low time OE high time OE low time to shutdown delay Conditions ILED = 100 mA ILED = 100 mA ILED = 100 mA ILED = 100 mA ILED = 100 mA 1 5 4 8 Min Typ 1.4 600 300 300 300 Max Units ms ns ns ns ns ms ms ms
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CAT4109
tHI tLO Output Enable SHUTDOWN tP2 tPS LED Current SHUTDOWN 0 mA tP1 tR 90% 50% 50% 10% 0 mA tF ILED = (1.2 V/RSET) x 400 SHUTDOWN 0 mA tPWRDWN
VIN Quiescent Current SHUTDOWN 0 mA SHUTDOWN 0 mA
Figure 2. CAT4109 OE Timing OE Operation
The Output Enable (OE) pin has two primary functions. When the OE input goes from high to low, all three LED channels are turned off. If OE remains low for longer than tPWRDWN, the device enters shutdown mode drawing "zero current" from the supply. The OE input can be used to adjust the contrast of the RGB LED by applying an external PWM signal. The device has a very fast turn-on time (from OE rising to LED on) allowing "instant on" when dimming LEDs. When applying PWM signals to the three PWMx inputs and using the OE pin for dimming, the OE PWM frequency should be much lower to preserve the color mixing.
Accurate linear dimming on OE is compatible with PWM frequencies from 100 Hz to 5 kHz for PWM duty cycle down to 1%. PWM frequencies up to 50 kHz can be supported for duty cycles greater than 10%. When performing a combination of low frequencies and small duty cycles, the device may enter shutdown mode. This has no effect on the dimming accuracy, because the turn-on time tPS is very short, in the range of 1 ms. To ensure that PWM pulses are recognized, pulse width low time tLO should be longer than 1 ms. The driver enters a "zero current" shutdown mode after a 4 ms delay (typical) when OE is held low.
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CAT4109
TYPICAL PERFORMANCE CHARACTERISTICS
(VIN = 5 V, VDD = 5 V, C1 = 1 mF, TAMB = 25C unless otherwise specified.) 1.2 QUIESCENT CURRENT (mA) QUIESCENT CURRENT (mA) No Load 1.0 8.0
6.0
0.8
4.0
0.6
2.0
0.4
3.0
3.5
4.0
4.5
5.0
5.5
0
0
100
200 RSET CURRENT (mA)
300
400
INPUT VOLTAGE (V)
Figure 3. Quiescent Current vs. Input Voltage (ILED = 0 mA)
6.0 QUIESCENT CURRENT (mA) Full Load LED CURRENT (mA) 200 160 120 80 40 0
Figure 4. Quiescent Current vs. RSET Current
5.5
5.0
4.5
4.0
3.0
3.5
4.0
4.5
5.0
5.5
0
0.2
0.4
0.6
0.8
1.0
INPUT VOLTAGE (V)
LED PIN VOLTAGE (V)
Figure 5. Quiescent Current vs. Input Voltage (ILED = 175 mA)
200 160 120 80 40 0 200 160 LED CURRENT (mA) 120
Figure 6. LED Current vs. LED Pin Voltage
LED CURRENT (mA)
80 40 0
3.0
3.5
4.0
4.5
5.0
5.5
-40
0
40 TEMPERATURE (C)
80
120
INPUT VOLTAGE (V)
Figure 7. LED Current Change vs. Input Voltage
Figure 8. LED Current Change vs. Temperature
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CAT4109
TYPICAL PERFORMANCE CHARACTERISTICS
(VIN = 5 V, VDD = 5 V, C1 = 1 mF, TAMB = 25C unless otherwise specified.) 1.30 1.30
RSET VOLTAGE (V)
1.20
RSET VOLTAGE (V)
1.25
1.25
1.20
1.15
1.15
1.10
3.0
3.5
4.0
4.5
5.0
5.5
1.10 -40
0
40 TEMPERATURE (C)
80
120
INPUT VOLTAGE (V)
Figure 9. RSET Pin Voltage vs. Input Voltage
200 160 LED CURRENT (mA)
Figure 10. RSET Pin Voltage vs. Temperature
120 80 40 0
0
15
30 RSET (kW)
45
60
Figure 11. LED Current vs. RSET Resistor
Figure 12. OE Transient Response at 1 kHz
Figure 13. PWMx Transient Response
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CAT4109
Table 5. PIN DESCRIPTIONS
Name PGND GND PWM3 PWM2 PWM1 RSET3 RSET2 RSET1 LED3 LED2 LED1 NC NC NC OE VDD Pin Number 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Power Ground. Ground Reference. PWM control input for LED3 PWM control input for LED2 PWM control input for LED1 LED current set pin for LED3 LED current set pin for LED2 LED current set pin for LED1 LED channel 3 cathode terminal LED channel 2 cathode terminal LED channel 1 cathode terminal Not connected inside package Not connected inside package Not connected inside package Output Enable input pin Device Supply pin Function
Pin Function PGND is the power ground reference pin for the device. This pin must be connected to the GND pin and to the ground plane on the PCB. GND is the ground reference pin for the entire device. This pin must be connected to the ground plane on the PCB. PWM1 to PWM3 are the control inputs respectively for LED1, LED2 and LED3 channels. When PWMx are low, the associated LED channels are turned off. When PWMx are high, the corresponding channels are turned on, assuming the OE input is also high. PWMx pins can not be left open and must be set either to logic high or low. RSET1 to RSET3 are the LED current set inputs. The current pulled out of these pins will be mirrored in the corresponding LED channel with a gain of 400. LED1 to LED3 are the LED current sink inputs. These pins are connected to the bottom cathodes of the LED strings.
The current sinks bias the LEDs with a current equal to 400 times the corresponding RSETx pin current. For the LED sink to operate correctly the voltage on the LED pin must be above 0.4 V. Each LED channel can withstand voltages up to 25 V. OE is the output enable input. When high, all LED channels are enabled according to the state of their corresponding PWMx control inputs. When low, all LED channels are turned off. This pin can be used to turn all the LEDs off independently of the state of the PWMx inputs. If the OE stays low for a duration longer than tPWRDWN, the device enters shutdown mode. VDD is the positive supply pin voltage for the entire device. A small 1 mF bypass ceramic capacitor is recommended between VDD pin and ground near the device.
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CAT4109
BLOCK Diagram
LED1 LED2 LED3 VDD RSET3 RSET2 RSET1 OE 1.2 V Ref Current Setting Current Setting Current Setting CURRENT SINKS +
PWM1 PWM2 PWM3 PGND GND
Figure 14. CAT4109 Functional Block Diagram Basic Operation
The CAT4109 uses 3 independent current sinks to accurately regulate the current in each LED channel to 400 times the current sink from the corresponding RSET pin. Each of the resistors tied to the RSET1, RSET2, RSET3 pins set the current respectively in the LED1, LED2, and LED3 channels. Table 6 shows standard resistor values for RSET and the corresponding LED current.
Table 6. RSET RESISTOR SETTINGS
LED Current [mA] 20 60 100 175 RSET [kW] 24.9 8.45 5.23 3.01
Tight current regulation for all channels is possible over a wide range of input and LED voltages due to independent current sensing circuitry on each channel. The LED channels have a low dropout of 0.4 V or less for all current ranges and supply voltages. This helps improve heat dissipation and efficiency. Upon power-up, an under-voltage lockout circuit sets all outputs to off. Once the VDD supply voltage is greater than the under-voltage lockout threshold, the device channel can be turned on. The on/off state of each channel LED1, LED2 and LED3 is independently controlled respectively by PWM1, PWM2, PWM3. When a PWMx is high, the associated LEDx channel is turned on.
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CAT4109
Application Information
Power Dissipation Recommended Layout
The power dissipation (PD) of the CAT4109 can be calculated as follows:
P D + V DD I DD ) S V LEDN I LEDN
where VLEDN is the voltage at the LED pin, and ILEDN is the associated LED current. Combinations of high VLED voltage or high ambient temperature can cause the CAT4109 to enter thermal shutdown. In applications where VLEDN is high, a resistor can be inserted in series with the LED string to lower PD. Thermal dissipation of the junction heat consists primarily of two paths in series. The first path is the junction to the case (qJC) thermal resistance which is defined by the package style, and the second path is the case to ambient (qCA) thermal resistance, which is dependent on board layout. The overall junction to ambient (qJA) thermal resistance is equal to:
q JA + q JC ) q CA
Bypass capacitor C1 should be placed as close to the IC as possible. RSET resistors should be directly connected to the GND pin of the device. For better thermal dissipation, multiple via can be used to connect the GND pad to a large ground plane. It is also recommended to use large pads and traces on the PCB wherever possible to spread out the heat. The LEDs for this layout are driven from a separate supply (VLED+), but they can also be driven from the same supply connected to VDD.
For a given package style and board layout, the operating junction temperature TJ is a function of the power dissipation PD, and the ambient temperature, resulting in the following equation:
T J + T AMB ) P D (q JC ) q CA) + T AMB ) P D q JA
When mounted on a double-sided printed circuit board with two square inches of copper allocated for "heat spreading", the resulting qJA is about 74C/W. For example, at 60C ambient temperature, the maximum power dissipation is calculated as follow:
P Dmax + (T Jmax * T AMB) (150 * 60) + + 1.2 W q JA 74
Figure 15. Recommended Layout
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CAT4109
PACKAGE DIMENSIONS
SOIC-16, 150 mils CASE 751BG-01 ISSUE O
SYMBOL A A1 b c E1 E D E E1 e h L PIN#1 IDENTIFICATION TOP VIEW 0.25 0.40 MIN 1.35 0.10 0.33 0.19 9.80 5.80 3.80 9.90 6.00 3.90 1.27 BSC 0.50 1.27 NOM MAX 1.75 0.25 0.51 0.25 10.00 6.20 4.00
q
0
8
D
h
A
q
e
b A1 SIDE VIEW
L
c
END VIEW
Notes: (1) All dimensions are in millimeters. Angles in degrees. (2) Complies with JEDEC MS-012.
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CAT4109
Example of Ordering Information (Note 5)
Prefix CAT Device # 4109 Suffix V -G T2
Company ID (Optional)
Product Number 4109
Package V: SOIC
Lead Finish G: NiPdAu Blank: Matte-Tin
Tape & Reel (Note 7) T: Tape & Reel 2: 2,000 / Reel
3. 4. 5. 6. 7.
All packages are RoHS-compliant (Lead-free, Halogen-free). The standard plated finish is NiPdAu. The device used in the above example is a CAT4109V-GT2 (SOIC, NiPdAu, Tape & Reel, 2,000/Reel). For additional temperature options, please contact your nearest ON Semiconductor Sales office. For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800-282-9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81-3-5773-3850 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative
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CAT4109/D

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